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Technically Speaking, Inc

VERSAL AI Engine (Level 3) Workshop 1


This workshop is restricted to customers who have attended either "Designing with Versal ACAP AIE" (Level 1 or Level 2)  


 Course Description 

This interactive workshop covers selected advanced features of the Versal™ ACAP AI Engine, including debugging an application in the Vitis™ unified software platform, using filter intrinsics, implementing a system design in hardware, and optimizing an AI Engine kernel program.

The emphasis of this workshop is on:

  • Describing advanced features of the Versal ACAP AI Engine architecture
  • Debugging applications using the Vitis unified software platform
  • Using AI Engine filter intrinsics and programming a FIR filter using filter intrinsics
  • Optimizing AI Engine kernels using compiler directives, programming style, and efficient movement of data


 After completing this comprehensive training, you will have the necessary skills to:

  • Debug an application using the simulation debugging methodology and event traces
  • Identify and debug the various problems that arise in application development
  • Utilize various AI Engine kernel optimization techniques, such as compiler directives, software pipelining, coding for performance, and core utilization
  • Apply C coding guidelines for performance improvement, pointer restricting, and code shuffling
  • Implement an AI Engine kernel using intrinsics for a symmetric FIR with mul4_sym and mac4_sym
  • Implement an AI Engine kernel using a non-symmetric FIR with mul4_nc and mac4_nc


Workshop Outline

  • AI Engine Architecture and Data Movement (Brief Review) Review the architecture of the AI Engine and describes the AI Engine interfaces that are available, including the memory, lock, core debug, cascaded stream, and AXI-Stream. Describes the memory module architecture for the AI Engine and how memory can be accessed by the AI Engines in the AI Engine arrays. {Lecture}

  • Debugging AI Engine Applications 1  Describes the application simulation debugging methodology and debugging with event traces, such as AI Engine events, DMA events, lock events, and stream events. Also demonstrates how to visualize these events in the Vitis unified software platform.{Lecture}

  • Debugging AI Engine Applications 2 (Use Cases) Reviews various use cases of problems that arise, such as memory conflicts and deadlock analysis. Also, covers performance analysis (profiling) in hardware. {Lecture, Demo}
  • AI Engine Kernel Optimization – Compiler Directives Describes the usage of compiler directives for loop unrolling, loop flattening, and software pipelining to help improve the performance of AI Engine kernels. {Lecture}
  • §   AI Engine Kernel Optimization – Coding Style

Covers the C coding guidelines for performance improvement, pointer restricting, and code shuffling. {Lecture}

  • §   AI Engine Kernel Optimization

Illustrates kernel optimization techniques, such as the restrict keyword, custom pragmas, and code restructuring. Also covers using additional accumulators for improved scheduling and calculating AI Engine core utilization for the kernels to help improve performance. {Lecture Lab/ Demo}

  • §   Data Types – (Brief Review)

Provides an AI Engine functional overview and identifies the supported vector data types and high-width registers for allowing single instruction, multiple data (SIMD) instructions. {Lecture}

  • §   AI Engine Symmetric Filter Implementation

Describes advanced MAC intrinsic syntax, including the intrinsics for symmetric FIR implementation, such as mul4_sym and mac4_sym. Also provides guidelines for choosing the right fixed-point intrinsics for a FIR filter. {Lecture, Lab/Demo}

  • §   AI Engine Non-Symmetric Filter Implementation

Describes the intrinsics for non-symmetric FIR implementations, such as mul4_nc and mac4_nc. Also provides guidelines for choosing the right intrinsics for a FIR filter. {Lecture}


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